Do Cong Thuan

Lecturer, Department Of Computer Engineering

Ph.D. (Computer Engineering, Chonnam National University, Korea, 2018)
MS. (Computer Engineering, Chonnam National University, Korea, 2014)
Eng. (Electronics and Telecommunications, Hanoi University of Science and Technology, Vietnam, 2012) 

Email: thuandc@soict.hust.edu.vn; thuan.docong@hust.edu.vn

Web: 

• CPU/GPGPU
• High-performance, low-power microarchitecture
• Multi-core processors
• Monolithic 3D-based architecture
• Embedded system
• AI for IoT

• CPU/GPGPU
• High-performance, low-power microarchitectures
• Multi-core processors
• Monolithic 3D-based architecture
• Embedded system
• AI for IoT

Do Cong Thuan has been on the faculty at School of Information and Communications Technology (SoICT), Hanoi University of Science and Technology (HUST), Vietnam, since 2020. He received his Engineer degree in Electronics and Telecommunications from HUST in 2012. Afterwards, he received his Master’s degree and Doctoral degree in Computer Engineering from Chonnam National University, Korea, in 2014 and 2018, respectively. Before joining HUST, he worked as a Research Professor in the Department of Computer Science and Engineering, Korea University, Korea, for about 2 years. His research focus is computer architecture, CPU/GPGPU, and monolithic 3D-based architecture. He has published many papers in the ISI/SCOPUS indexed journals and premier conferences related to EDA (e.g., ISLPED and ICCD), and has been granted 9 KIPO patents for his research. Currently, he is also interested in AI for IoT and embedded systems.

• Cong Thuan Do, Cheol Hong Kim, and Sung Woo Chung. “Aggressive GPU Cache Bypassing with Monolithic 3D Based NoC.” Springer Journal of Supercomputing (SUPE), vol. 79, no. 5, 2023.
• Cong Thuan Do, Anh Nam Le, Van Duc Nguyen, and Van Chien Trinh, “Deep Learning-based Prediction of Alertness and Drowsiness using EEG Signals.” The 12th ACM International Symposium on Information and Communication Technology (SOICT), Ho Chi Minh City, Vietnam, 2023.
• Cong Thuan Do, Jeong Hwan Choi, Young Seo Lee, Cheol Hong Kim, and Sung Woo Chung. “Enhancing Matrix Multiplication with a Monolithic 3D Based Scratchpad Memory.” IEEE Embedded Systems Letters (ESL), vol. 13, no. 2, 2021.
• Cong Thuan Do, Hong Jun Choi, Sung Woo Chung, and Cheol Hong Kim. “A Novel Warp Scheduling Scheme Considering Long-Latency Operations for High-Performance GPUs.” Springer Journal of Supercomputing (SUPE), vol. 76, no. 4, 2020.
• Cong Thuan Do, Cheol Hong Kim, and Sung Woo Chung. “A Novel Monolithic 3D Based GPU Cache Architecture.” The 37th IEEE International Conference on Computer Design (ICCD), Abu Dhabi, UAE, 2019. (poster) [Paper Acceptance Rate = 32%, 87 oral presentations + 21 posters]
• Cong Thuan Do, Young Ho Gong, Cheol Hong Kim, Seon Wook Kim, and Sung Woo Chung. “Exploring the Relation between Monolithic 3D L1 GPU Cache Capacity and Warp Scheduling Efficiency.” The 25th ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), Lausanne, Switzerland, 2019. [Paper Acceptance Rate = 23%, 39 oral presentations + 16 posters]
• Cong Thuan Do, Min Goo Moon, Jong Myon Kim, and Cheol Hong Kim. “A Study on L1 Data Cache Bypassing Methods for High-Performance GPUs.” The 19th International Conference on Parallel and Distributed Computing: Applications and Technologies (PDCAT), Jeju, South Korea, 2018.
• Cong Thuan Do, Jong Myon Kim, and Cheol Hong Kim. “Application Characteristics-Aware Sporadic Cache Bypassing for High Performance GPGPUs.” Elsevier Journal of Parallel and Distributed Computing (JPDC), vol. 122, 2018.

• IT3030: Computer Architecture
• IT3420(E): Electronics for Information Technology
• IT4162: Microprocessors
• IT4210: Embedded Systems
• IT4593: Introduction to Communication Engineering